PanelLink® is a digital video interface (DVI) specification to provide video data over a cable through differential signaling. Although the specification specifies both the differential voltage swing and common mode range, there is a some room for common-mode variation. If the common mode varies with this room, the receiver is supposed to detect the original data correctly. By intentionally varying the common mode value, additional data can be transferred over the same cable without hurting the original video data. This data transfer can occur in both directions as long as the common mode data and differential mode data do not interfere with each other.
FIG. 1 illustrates a prior art transmitter and receiver system for sending additional data (TxData) using common mode signaling over an existing PanelLink® signaling system. This scheme modulates the common mode of two PanelLink® channels in opposite directions to represent a bit and detects the difference of the common mode of those two channels to recover the bit. There are four channels in a PanelLink® Tx-Rx pair so two common mode signaling channels can be added. U.S. Pat. No. 6,307,543 to Martin provides additional information.
Referring to FIG. 1, a chip 120 (for example, a PanelLink® transmitter) is coupled to a chip 122 (for example, a PanelLink® receiver) through a first channel 124 including conductors 126 and 128 and a second channel 130 including conductors 132 and 134. Red data is provided differentially through input signals Tx-R+ and Tx-R− at the gates of transistors Q1 and Q2, and green data is provided differentially through input signals Tx-G+ and Tx-G− at the gates of transistors Q3 and Q4, where transistors Q1-Q4 are N-channel metal oxide semiconductor field effect transistor (NMOSFETs). VDD is at 3.3 volts. Resistors R2, R3, R6, and R7 have 50 ohm values.
When Tx-R+ is high and Tx-R− is low, transistor Q1 is ON and the voltage of conductor 126 is pulled down by 500 mV from VDD based on the values of resistors R1 and R2, and transistor Q2 is OFF so that the voltage of conductor 128 is essentially VDD. Similarly, when Tx-R+ is low and Tx-R− is high, transistor Q2 is ON and the voltage of conductor 128 is pulled down by 500 mV from VDD based on the values of resistors R1 and R3, and transistor Q1 is OFF so that the voltage of conductor 126 is essentially VDD. Accordingly, the common mode is 3.05 volts=(3.3+2.8)/2. Comparator 146 provides a high or low output based on whether conductor 126 has a higher or low voltage than on conductor 128. The same is true with the Tx-G+ and Tx-G− signals and transistors Q3, Q4, Q7, and Q8, conductors 132 and 134, and resistors R6, R7, and R10. Comparator 150 provides a high or low output based on whether conductor 132 has a higher or low voltage than on conductor 134.
When Tx-Data in chip 122 is high, the common mode on conductors 126 and 128 is made slightly higher because transistors Q5 and Q6 are turned ON reducing the effective resistance between conductors 126 and VDD or conductor 128 and VDD. However, when Tx-Data is high, transistors Q7 and Q8 are OFF so that the common mode of conductors 132 and 134 remains unchanged. Conversely, when Tx-Data is low, the common mode on conductors 132 and 134 is changed slightly because transistors Q7 and Q8 are turned ON reducing the effective resistance between conductors 132 and VDD or conductor 134 and VDD. However, when Tx-Data is low, the common mode of conductors 126 and 128 remains unchanged.
When Tx-Data is high, the voltage at node N1 is higher than the voltage at node N2. Comparator 160 provides a high output Rx-Data in response thereto. Conversely, when Tx-Data is low, the voltage at node N2 is higher than the voltage at node N1. Comparator 160 provides a low output Rx-Data in response thereto. In this way, an additional signal Tx-Data can be simultaneously transmitted over channels 124 and 130.
The signaling may be fully differential or pseudo-differential.